1. Technical Field
The technical field relates to modulation and demodulation of data, particularly to modulation and demodulation of data using a multilevel amplitude modulation scheme for transmitting information of a plurality of bits with one symbol.
2. Related Art
Signal processing in audio-visual devices such as televisions and recorders has been increasing in speed year after year, and transmission speed required for data transmission between these devices has been also increasing year by year. The necessity for efficient transmission of a large amount of data with limited bands of transmission lines has been increasing accordingly.
There is a multilevel transmission scheme as one of the methods of transmitting a larger amount of data on the limited bands of transmission lines. A multilevel amplitude modulation scheme as one type of the multilevel transmission scheme employs four or more amplitude levels (voltage levels) to a symbol forming a transmission signal. Such a multilevel amplitude modulation scheme enables transmission of information of a plurality of bits with one symbol. For example, in four-level amplitude modulation, information of two bits corresponds to four voltage levels. The four-level amplitude modulation thus realizes data transmission speed twice as fast as that of two-level transmission in a same bandwidth.
Employment of encoding schemes of small overhead is another measure for realizing higher efficiency in data transmission. The 64B66B encoding scheme disclosed in Patent Literature 1 (PTL1: JP 2001-298490 A) is one example of such encoding schemes of small overhead. The encoding scheme according to PTL1 (JP 2001-298490 A) uses a code word including a header of two bits and a payload of 64 bits. The header according to the 64B66B encoding scheme has a pattern including level transition (“01” or “10”), and a receiving device synchronizes the code word and detects the type of data with use of the header. The payload according to the 64B66B encoding scheme stores scrambled transmission data. Such scrambling is executed in order to secure DC balance and reduce EMI by flattening a signal spectrum.
The overhead according to the 64B66B encoding scheme is 3.125%. On the other hand, the 8B10B encoding scheme, which is generally used, has overhead of 25%. The overhead according to the 64B66B encoding scheme is much smaller than that of the 8B10B encoding scheme. In view of the above, the 64B66B encoding scheme is useful for more efficient data transmission.
FIG. 22 is a block diagram showing an example of a configuration of a transmitter including a modulation unit that employs the four-level amplitude modulation scheme and the 64B66B encoding scheme. FIG. 23 is a block diagram showing an example of a configuration of a receiver including a demodulation unit corresponding to the modulation unit shown in FIG. 22.
Referring to FIG. 22, a transmitter 900T includes dual encoding mechanisms (911a to 915a and 911b to 915b) in order to transmit data of two bits with one symbol.
Transmission data 931 of 128 bits is initially halved into two pieces of data of 64 bits, which are received by two scramblers 911a and 911b to be scrambled. The pieces of data scrambled by the scramblers 911a and 911b are received by parallel/serial converters 915a and 915b as transmission scrambled data 933a and 933b. The parallel/serial converters 915a and 915b also receive header bits 935a and 935b of two bits generated by header generators 913a and 913b. The header generators 913a and 913b generate the header bits 935a and 935b so as to correspond to the type of the transmission data (whether ordinary data or a control signal). The parallel/serial converters 915a and 915b converts the two pieces of transmission scrambled data 933a and 933b of 64 bits as well as the header bits 935a and 935b of two bits thus received into serial signals, and outputs a modulation input signal 937a (upper bits) and a modulation input signal 937b (lower bits). In accordance with the arrangement shown in FIG. 24 or the like, a multilevel modulator 917 obtains multiple signal levels corresponding to data of two bits obtained from the modulation input signal 937a as an upper bit and the modulation input signal 937b as a lower bit, and outputs a signal having amplitude (voltage) of the levels thus obtained as a multilevel amplitude modulation transmission signal 939.
Described next with reference to FIG. 23 is operation of the receiver that demodulates a modulation signal. A multilevel demodulator 957 in a receiver 900R receives a reception signal 979 (the transmission signal 939 obtained by multilevel amplitude modulation in FIG. 22). In accordance with the arrangement shown in FIG. 24 or the like, the multilevel demodulator 957 demodulates the reception signal 979 and outputs a (upper bit) demodulation output signal 977a and a (lower bit) demodulation output signal 977b. Serial/parallel converters 955a and 955b convert the demodulation output signals 977a and 977b into parallel signals and output a (upper bit) reception parallel signal 975a and a (lower bit) reception parallel signal 975b, respectively. A parallel signal synchronizer 953 initially detects headers in the reception parallel signals 975a and 975b, demodulates the order of bits on the basis of the detected headers, and outputs reception scrambled data 973a and 973b. Descramblers 951a and 951b descramble the reception scrambled data 973a and 973b and output reception data 971.